1. Field of the Invention
This invention relates to a mask ROM formed for improvement of the manufacturing yield, and more particularly to a mask ROM having spare memory cells.
2. Description of the Related Art
As the memory capacity of a random access memory (RAM) in which the data write-in and readout operation can be effected has increased, redundancy means for relieving defective cells has been used more frequently. In order to compensate for defective memory cells, spare memory cells, which are formed with the same structure as the main memory cells, are arranged in the same memory array as the main memory cells and are connected to bit lines to which the main memory cells are also connected. In a case where one or more main memory cells are detected to be defective, the spare memory cells are used instead of the defective main memory cells so as to enhance the manufacturing yield of the RAM.
In contrast, in a mask ROM, which can be programmed by use of a mask in the manufacturing process, it is generally considered impossible to provide spare memory cells with the same structure as the main memory cells and selectively use them instead of the main memory cells. However, as the memory capacity of the mask ROM increases, the manufacturing yield may be rapidly lowered in conjunction with an increase in the chip size and miniaturization of the elements. Thus, in the mask ROM, it is also necessary to take measures compensate for defective memory cells.
As the repairing measures for the mask ROM, a double cell method, error collecting code (ECC) method, fuse programming method, PROM method and the like have been proposed. However, when the chip size, operation speed and ease of the processing for the cost are considered, none of the above-described methods can be effectively realized and no redundancy means is generally used. For example, the fuse programming method is advantageous in the operation speed and the ease of the processing, and defective memory cells of several bits can be compensated for. However, in this case, a mask alignment error or patterning error may tend to occur with the miniaturization, thereby breaking or shorting the word lines or bit lines, and it is practically impossible to compensate for defective memory cells on the same rows or columns which may be caused by the breakage (cutoff) or short of the word lines or bit lines. In ROMs actually formed, defective memory cells may occur in the unit of row or column. That is, in a case where the word line or bit line is cut off, all the memory cells on the same row or column connected to the broken or cutoff word line or bit line become defective. Further, in a case where the word lines or bit lines are shorted, all the memory cells on the same rows or columns connected to at least two shorted word lines or bit lines become defective. As a result, a large number of spare memory cells are required, thereby increasing the chip size.
Thus, when an attempt is made, with the conventional mask ROM, to add the redundancy function to compensate for the defect or to intentionally rewrite the ROM data, the chip size will increase.